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> You're absolutely right that terms like "7nm" have become decoupled from a specific measurement and are largely marketing terms, though

Everybody says this, if I've read it once on HN, I've read it a million times.

But it bothered me, why should it be difficult to come up with a reasonably meaningful number? Just find out how many transistors can be placed in a given area, pretend they are laid out in a square, and find the number on a side, to calculate the linear density.

Well, I looked up and calculated this for several chips/processes, and I found that the number was consistently around 10 times the published figure, in nm.

The further interesting thing I discovered is that this seemed to go way back with no particular change in the ratio.

So it appears to me that the "decoupling" of the number from reality is a myth; it's not "real" but it's the same ratio it's always been.

But then, there's no obvious (to me) reason why a realistic number is out of the question, either.




> The further interesting thing I discovered is that this seemed to go way back with no particular change in the ratio.

Exactly, as that's more or less what "process node" refers to today. I guess they don't want to change the metric as some could be confused by it.

> But it bothered me, why should it be difficult to come up with a reasonably meaningful number? Just find out how many transistors can be placed in a given area, pretend they are laid out in a square, and find the number on a side, to calculate the linear density.

There are plenty of other metrics. As usual, measuring only one number hides half the story. A process node is characterized by gate leakage and capacitance among others, for the electrical characteristics. Then, more meaningful surface area metrics are the size of an actual logic cell, like SRAM or a flipflop. Some processes lend themselves to optimizations that wouldn't be visible if just placing transistors side by side.




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