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Quoth WP: "Modern ASICs often include entire microprocessors, memory blocks including ROM, RAM, EEPROM, flash memory and other large building blocks. Such an ASIC is often termed a SoC (system-on-chip). "

The ARM core on the SoC is part of the asic. As is the VideoCore part.




I think what OP meant was ASIC specific to deep learning like TPU's. However as I see, current frameworks are not matured enough to support GPU's and TPU's with exact same code. Also there are no standards so every big org is going to build support for their own ASIC interfaces for the framework they manage. Is there an open source interface for ASIC's for deep learning?


Yes. I was talking about AI Chips (FPGA and ASICs - NN Processors). https://github.com/basicmi/Deep-Learning-Processor-List https://www.nextbigfuture.com/2017/11/at-least-16-companies-....

Cambricon is going big in china so its not just google and apples. They claim to be 6 times faster than GPU.

I am more interested in potential of being able to run video processing, voice models effortlessly on tiny devices. and also to train models offline or locally.

I think there is a good scope of solutions (like vision recognition) that port well across AI chips.


>> Also there are no standards so every big org is going to build support for their own ASIC interfaces for the framework they manage.

This is true. Google has TF for tpu and Intel Nervana has neon. Each player will likely publish a software library.




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